Test WRC+poana+ctrlisbnar

ARM WRC+poana+ctrlisbnar
"RfeNaA PodRWANa Rfe DpCtrlIsbdRNaR FreRNa"
Cycle=Rfe DpCtrlIsbdRNaR FreRNa RfeNaA PodRWANa
Prefetch=1:x=F,1:y=W,2:y=F,2:x=T
Com=Rf Rf Fr
Orig=RfeNaA PodRWANa Rfe DpCtrlIsbdRNaR FreRNa
{ ok=1;
%x0=x;
%x1=x; %y1=y; %ok1=ok;
%y2=y; %x2=x;
}
 P0           | P1                 | P2             ;
 MOV R0,#1    | LDREX R0,[%x1]     | LDR R0,[%y2]   ;
 STR R0,[%x0] | STREX %T2,R0,[%x1] | CMP R0,R0      ;
              | CMP %T2,#0         | BNE LC00       ;
              | BNE Fail1          | LC00:          ;
              | MOV R1,#1          | ISB            ;
              | STR R1,[%y1]       | LDREX R1,[%x2] ;
              | B Exit1            |                ;
              | Fail1:             |                ;
              | MOV R2,#0          |                ;
              | STR R2,[%ok1]      |                ;
              | Exit1:             |                ;
Observed
    1:R0=1; 2:R0=1; 2:R1=0; ok=1; x=1;