ARM WRC+poaa+dmbrna "RfeNaA PodRWAA RfeAR DMBdRRRNa Fre" Cycle=RfeNaA PodRWAA RfeAR DMBdRRRNa Fre Prefetch=1:x=F,1:y=W,2:y=F,2:x=T Com=Rf Rf Fr Orig=RfeNaA PodRWAA RfeAR DMBdRRRNa Fre { ok=1; %x0=x; %x1=x; %y1=y; %ok1=ok; %y2=y; %x2=x; } P0 | P1 | P2 ; MOV R0,#1 | LDREX R0,[%x1] | LDREX R0,[%y2] ; STR R0,[%x0] | STREX %T2,R0,[%x1] | DMB ; | CMP %T2,#0 | LDR R1,[%x2] ; | BNE Fail1 | ; | MOV %T3,#1 | ; | LDREX R1,[%y1] | ; | STREX %T2,%T3,[%y1] | ; | CMP %T2,#0 | ; | BNE Fail1 | ; | B Exit1 | ; | Fail1: | ; | MOV R2,#0 | ; | STR R2,[%ok1] | ; | Exit1: | ; Observed 1:R0=1; 1:R1=0; 2:R0=1; 2:R1=0; ok=1; x=1; y=1;