ARM WRC+datarna+dmbrr+A "RfeAR DpDatadWRNa RfeNaR DMBdRRRR FreRA" Cycle=RfeNaR DMBdRRRR FreRA RfeAR DpDatadWRNa Prefetch=1:x=F,1:y=W,2:y=F,2:x=T Com=Rf Rf Fr Orig=RfeAR DpDatadWRNa RfeNaR DMBdRRRR FreRA { ok=1; %x0=x; %ok0=ok; %x1=x; %y1=y; %y2=y; %x2=x; } P0 | P1 | P2 ; MOV %T3,#1 | LDREX R0,[%x1] | LDREX R0,[%y2] ; LDREX R0,[%x0] | EOR R1,R0,R0 | DMB ; STREX %T2,%T3,[%x0] | ADD R1,R1,#1 | LDREX R1,[%x2] ; CMP %T2,#0 | STR R1,[%y1] | ; BNE Fail0 | | ; B Exit0 | | ; Fail0: | | ; MOV R1,#0 | | ; STR R1,[%ok0] | | ; Exit0: | | ; Observed 0:R0=0; 1:R0=1; 2:R0=1; 2:R1=0; ok=1; x=1;