ARM WRC+data+dmbnaa+A "RfeANa DpDatadW Rfe DMBdRRNaA FreAA" Cycle=Rfe DMBdRRNaA FreAA RfeANa DpDatadW Prefetch=1:x=F,1:y=W,2:y=F,2:x=T Com=Rf Rf Fr Orig=RfeANa DpDatadW Rfe DMBdRRNaA FreAA { ok=1; %x0=x; %ok0=ok; %x1=x; %y1=y; %y2=y; %x2=x; %ok2=ok; } P0 | P1 | P2 ; MOV %T3,#1 | LDR R0,[%x1] | LDR R0,[%y2] ; LDREX R0,[%x0] | EOR R1,R0,R0 | DMB ; STREX %T2,%T3,[%x0] | ADD R1,R1,#1 | LDREX R1,[%x2] ; CMP %T2,#0 | STR R1,[%y1] | STREX %T2,R1,[%x2] ; BNE Fail0 | | CMP %T2,#0 ; B Exit0 | | BNE Fail2 ; Fail0: | | B Exit2 ; MOV R1,#0 | | Fail2: ; STR R1,[%ok0] | | MOV R2,#0 ; Exit0: | | STR R2,[%ok2] ; | | Exit2: ; Observed 0:R0=0; 1:R0=1; 2:R0=1; 2:R1=0; ok=0; x=1;