ARM MP+poaa+ctrlisbra "PodWWAA RfeAR DpCtrlIsbdRRA FreAA" Cycle=RfeAR DpCtrlIsbdRRA FreAA PodWWAA Prefetch=0:x=F,0:y=W,1:y=F,1:x=T Com=Rf Fr Orig=PodWWAA RfeAR DpCtrlIsbdRRA FreAA { ok=1; %x0=x; %y0=y; %ok0=ok; %y1=y; %x1=x; %ok1=ok; } P0 | P1 ; MOV %T3,#1 | LDREX R0,[%y1] ; LDREX R0,[%x0] | CMP R0,R0 ; STREX %T2,%T3,[%x0] | BNE LC00 ; CMP %T2,#0 | LC00: ; BNE Fail0 | ISB ; MOV %T3,#1 | LDREX R1,[%x1] ; LDREX R1,[%y0] | STREX %T2,R1,[%x1] ; STREX %T2,%T3,[%y0] | CMP %T2,#0 ; CMP %T2,#0 | BNE Fail1 ; BNE Fail0 | B Exit1 ; B Exit0 | Fail1: ; Fail0: | MOV R2,#0 ; MOV R2,#0 | STR R2,[%ok1] ; STR R2,[%ok0] | Exit1: ; Exit0: | ; Observed 0:R0=0; 0:R1=0; 1:R0=1; 1:R1=0; ok=0; x=1; y=1;