Test IRIW+poaa+dmbrr

ARM IRIW+poaa+dmbrr
"RfeNaA PodRRAA FreANa RfeNaR DMBdRRRR FreRNa"
Cycle=RfeNaA PodRRAA FreANa RfeNaR DMBdRRRR FreRNa
Prefetch=1:x=F,1:y=T,3:y=F,3:x=T
Com=Rf Fr Rf Fr
Orig=RfeNaA PodRRAA FreANa RfeNaR DMBdRRRR FreRNa
{ ok=1;
%x0=x;
%x1=x; %y1=y; %ok1=ok;
%y2=y;
%y3=y; %x3=x;
}
 P0           | P1                 | P2           | P3             ;
 MOV R0,#1    | LDREX R0,[%x1]     | MOV R0,#1    | LDREX R0,[%y3] ;
 STR R0,[%x0] | STREX %T2,R0,[%x1] | STR R0,[%y2] | DMB            ;
              | CMP %T2,#0         |              | LDREX R1,[%x3] ;
              | BNE Fail1          |              |                ;
              | LDREX R1,[%y1]     |              |                ;
              | STREX %T2,R1,[%y1] |              |                ;
              | CMP %T2,#0         |              |                ;
              | BNE Fail1          |              |                ;
              | B Exit1            |              |                ;
              | Fail1:             |              |                ;
              | MOV R2,#0          |              |                ;
              | STR R2,[%ok1]      |              |                ;
              | Exit1:             |              |                ;
Observed
    1:R0=1; 1:R1=0; 3:R0=1; 3:R1=0; ok=1; x=1; y=1;