Test LB+addr+isyncra

Executions for behaviour: "0:r1=1 ; 1:r1=1 ; ok=1"

PPC LB+addr+isyncra
"DpAddrdW RfePR ISyncdRWRA RfeAP"
Cycle=RfeAP DpAddrdW RfePR ISyncdRWRA
Prefetch=
Com=Rf Rf
Orig=DpAddrdW RfePR ISyncdRWRA RfeAP
{ ok=1;
0:r2=x; 0:r5=y;
1:r2=y; 1:r4=x; 1:r6=ok;
}
 P0            | P1               ;
 lwz r1,0(r2)  | lwarx r1,r0,r2   ;
 xor r3,r1,r1  | isync            ;
 li r4,1       | li r3,1          ;
 stwx r4,r3,r5 | lwarx %sta,r0,r4 ;
               | stwcx. r3,r0,r4  ;
               | bne  Fail1       ;
               | b   Exit1        ;
               | Fail1:           ;
               | li r5,0          ;
               | stw r5,0(r6)     ;
               | Exit1:           ;
Observed
    0:r1=1; 1:r1=1; ok=1;