PPC lwswr003 "DpdR Fre LwSyncsWR DpdR Fre LwSyncsWR DpdR Fre LwSyncsWR" Cycle=DpdR Fre LwSyncsWR DpdR Fre LwSyncsWR DpdR Fre LwSyncsWR Relax=LwSyncsWR Safe=Fre DpdR { 0:r2=x; 0:r6=y; 1:r2=y; 1:r6=z; 2:r2=z; 2:r6=x; } P0 | P1 | P2 ; li r1,1 | li r1,1 | li r1,1 ; stw r1,0(r2) | stw r1,0(r2) | stw r1,0(r2) ; lwsync | lwsync | lwsync ; lwz r3,0(r2) | lwz r3,0(r2) | lwz r3,0(r2) ; xor r4,r3,r3 | xor r4,r3,r3 | xor r4,r3,r3 ; lwzx r5,r4,r6 | lwzx r5,r4,r6 | lwzx r5,r4,r6 ; exists (0:r3=1 /\ 0:r5=0 /\ 1:r3=1 /\ 1:r5=0 /\ 2:r3=1 /\ 2:r5=0)