Test MP+PPO192

PPC MP+PPO192
"Fre LwSyncdWW Rfe DpCtrldW PosWR DpCtrldW PosWR PosRR DpAddrdR"
Cycle=Rfe DpCtrldW PosWR DpCtrldW PosWR PosRR DpAddrdR Fre LwSyncdWW
Relax=
Safe=Rfe Fre PosWR PosRR LwSyncdWW DpAddrdR DpCtrldW
Prefetch=1:x=T
Com=Rf Fr
Orig=Fre LwSyncdWW Rfe DpCtrldW PosWR DpCtrldW PosWR PosRR DpAddrdR
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r4=z; 1:r7=a; 1:r12=x;
}
 P0           | P1               ;
 li r1,1      | lwz r1,0(r2)     ;
 stw r1,0(r2) | cmpw r1,r1       ;
 lwsync       | beq  LC00        ;
 li r3,1      | LC00:            ;
 stw r3,0(r4) | li r3,1          ;
              | stw r3,0(r4)     ;
              | lwz r5,0(r4)     ;
              | cmpw r5,r5       ;
              | beq  LC01        ;
              | LC01:            ;
              | li r6,1          ;
              | stw r6,0(r7)     ;
              | lwz r8,0(r7)     ;
              | lwz r9,0(r7)     ;
              | xor r10,r9,r9    ;
              | lwzx r11,r10,r12 ;
exists
(1:r1=1 /\ 1:r11=0)