PPC WRC+ctrlra+lwsyncrr+A "RfeAR DpCtrldWRA RfeAR LwSyncdRRRR FreRA" Cycle=RfeAR LwSyncdRRRR FreRA RfeAR DpCtrldWRA Prefetch=0:x=T,2:x=T Com=Rf Rf Fr Orig=RfeAR DpCtrldWRA RfeAR LwSyncdRRRR FreRA { ok=1; 0:r2=x; 0:r4=ok; 1:r2=x; 1:r4=y; 1:r6=ok; 2:r2=y; 2:r4=x; } P0 | P1 | P2 ; li r1,1 | lwarx r1,r0,r2 | lwarx r1,r0,r2 ; lwarx %sta,r0,r2 | cmpw r1,r1 | lwsync ; stwcx. r1,r0,r2 | beq LC00 | lwarx r3,r0,r4 ; bne Fail0 | LC00: | ; b Exit0 | li r3,1 | ; Fail0: | lwarx %sta,r0,r4 | ; li r3,0 | stwcx. r3,r0,r4 | ; stw r3,0(r4) | bne Fail1 | ; Exit0: | b Exit1 | ; | Fail1: | ; | li r5,0 | ; | stw r5,0(r6) | ; | Exit1: | ; exists (ok=1 /\ 1:r1=1 /\ 2:r1=1 /\ 2:r3=0)