PPC RWC+addrra+lwsyncap+A "RfeAR DpAddrdRRA FreAA LwSyncdWRAP FrePA" Cycle=RfeAR DpAddrdRRA FreAA LwSyncdWRAP FrePA Prefetch=0:x=T,1:y=T,2:x=T Com=Rf Fr Fr Orig=RfeAR DpAddrdRRA FreAA LwSyncdWRAP FrePA { ok=1; 0:r2=x; 0:r4=ok; 1:r2=x; 1:r5=y; 1:r7=ok; 2:r2=y; 2:r4=x; 2:r6=ok; } P0 | P1 | P2 ; li r1,1 | lwarx r1,r0,r2 | li r1,1 ; lwarx %sta,r0,r2 | xor r3,r1,r1 | lwarx %sta,r0,r2 ; stwcx. r1,r0,r2 | lwarx r4,r3,r5 | stwcx. r1,r0,r2 ; bne Fail0 | stwcx. r4,r3,r5 | bne Fail2 ; b Exit0 | bne Fail1 | lwsync ; Fail0: | b Exit1 | lwz r3,0(r4) ; li r3,0 | Fail1: | b Exit2 ; stw r3,0(r4) | li r6,0 | Fail2: ; Exit0: | stw r6,0(r7) | li r5,0 ; | Exit1: | stw r5,0(r6) ; | | Exit2: ; exists (ok=1 /\ 1:r1=1 /\ 1:r4=0 /\ 2:r3=0)