PPC WW+RR+WW+RR+poaas
"PodWWAA RfeAA PodRRAA FreAA PodWWAA RfeAA PodRRAA FreAA"
Prefetch=1:z=T,3:x=T
Com=Rf Fr Rf Fr
Orig=PodWWAA RfeAA PodRRAA FreAA PodWWAA RfeAA PodRRAA FreAA
{ ok=1;
0:r2=x; 0:r4=y; 0:r6=ok;
1:r2=y; 1:r4=z; 1:r6=ok;
2:r2=z; 2:r4=a; 2:r6=ok;
3:r2=a; 3:r4=x; 3:r6=ok;
}
P0 | P1 | P2 | P3 ;
li r1,1 | lwarx r1,r0,r2 | li r1,1 | lwarx r1,r0,r2 ;
lwarx %sta,r0,r2 | stwcx. r1,r0,r2 | lwarx %sta,r0,r2 | stwcx. r1,r0,r2 ;
stwcx. r1,r0,r2 | bne Fail1 | stwcx. r1,r0,r2 | bne Fail3 ;
bne Fail0 | lwarx r3,r0,r4 | bne Fail2 | lwarx r3,r0,r4 ;
li r3,1 | stwcx. r3,r0,r4 | li r3,1 | stwcx. r3,r0,r4 ;
lwarx %sta,r0,r4 | bne Fail1 | lwarx %sta,r0,r4 | bne Fail3 ;
stwcx. r3,r0,r4 | b Exit1 | stwcx. r3,r0,r4 | b Exit3 ;
bne Fail0 | Fail1: | bne Fail2 | Fail3: ;
b Exit0 | li r5,0 | b Exit2 | li r5,0 ;
Fail0: | stw r5,0(r6) | Fail2: | stw r5,0(r6) ;
li r5,0 | Exit1: | li r5,0 | Exit3: ;
stw r5,0(r6) | | stw r5,0(r6) | ;
Exit0: | | Exit2: | ;
~exists
(ok=1 /\ 1:r1=1 /\ 1:r3=0 /\ 3:r1=1 /\ 3:r3=0)