Test WRW+WR+lwsyncaa+lwsyncar+A

PPC WRW+WR+lwsyncaa+lwsyncar+A
"RfeAA LwSyncdRWAA WseAA LwSyncdWRAR FreRA"
Cycle=RfeAA LwSyncdRWAA WseAA LwSyncdWRAR FreRA
Prefetch=0:x=T,1:y=W,2:y=F,2:x=T
Com=Rf Ws Fr
Orig=RfeAA LwSyncdRWAA WseAA LwSyncdWRAR FreRA
{ ok=1;
0:r2=x; 0:r4=ok;
1:r2=x; 1:r4=y; 1:r6=ok;
2:r2=y; 2:r4=x; 2:r6=ok;
}
 P0               | P1               | P2               ;
 li r1,1          | lwarx r1,r0,r2   | li r1,2          ;
 lwarx %sta,r0,r2 | stwcx. r1,r0,r2  | lwarx %sta,r0,r2 ;
 stwcx. r1,r0,r2  | bne  Fail1       | stwcx. r1,r0,r2  ;
 bne  Fail0       | lwsync           | bne  Fail2       ;
 b   Exit0        | li r3,1          | lwsync           ;
 Fail0:           | lwarx %sta,r0,r4 | lwarx r3,r0,r4   ;
 li r3,0          | stwcx. r3,r0,r4  | b   Exit2        ;
 stw r3,0(r4)     | bne  Fail1       | Fail2:           ;
 Exit0:           | b   Exit1        | li r5,0          ;
                  | Fail1:           | stw r5,0(r6)     ;
                  | li r5,0          | Exit2:           ;
                  | stw r5,0(r6)     |                  ;
                  | Exit1:           |                  ;
exists
(ok=1 /\ y=2 /\ 1:r1=1 /\ 2:r3=0)