Test WRR+2W+addrra+lwsyncap

PPC WRR+2W+addrra+lwsyncap
"RfePR DpAddrdRRA FreAA LwSyncdWWAP Wse"
Cycle=RfePR DpAddrdRRA FreAA LwSyncdWWAP Wse
Prefetch=0:x=F,1:y=T,2:x=W
Com=Rf Fr Ws
Orig=RfePR DpAddrdRRA FreAA LwSyncdWWAP Wse
{ ok=1;
0:r2=x;
1:r2=x; 1:r5=y; 1:r7=ok;
2:r2=y; 2:r4=x; 2:r6=ok;
}
 P0           | P1              | P2               ;
 li r1,2      | lwarx r1,r0,r2  | li r1,1          ;
 stw r1,0(r2) | xor r3,r1,r1    | lwarx %sta,r0,r2 ;
              | lwarx r4,r3,r5  | stwcx. r1,r0,r2  ;
              | stwcx. r4,r3,r5 | bne  Fail2       ;
              | bne  Fail1      | lwsync           ;
              | b   Exit1       | li r3,1          ;
              | Fail1:          | stw r3,0(r4)     ;
              | li r6,0         | b   Exit2        ;
              | stw r6,0(r7)    | Fail2:           ;
              | Exit1:          | li r5,0          ;
              |                 | stw r5,0(r6)     ;
              |                 | Exit2:           ;
exists
(ok=1 /\ x=2 /\ 1:r1=2 /\ 1:r4=0)