Test WRR+2W+addrpr+lwsyncap+A

PPC WRR+2W+addrpr+lwsyncap+A
"RfeAP DpAddrdRPR FreRA LwSyncdWWAP WsePA"
Cycle=RfeAP DpAddrdRPR FreRA LwSyncdWWAP WsePA
Prefetch=0:x=F,1:y=T,2:x=W
Com=Rf Fr Ws
Orig=RfeAP DpAddrdRPR FreRA LwSyncdWWAP WsePA
{ ok=1;
0:r2=x; 0:r4=ok;
1:r2=x; 1:r5=y;
2:r2=y; 2:r4=x; 2:r6=ok;
}
 P0               | P1             | P2               ;
 li r1,2          | lwz r1,0(r2)   | li r1,1          ;
 lwarx %sta,r0,r2 | xor r3,r1,r1   | lwarx %sta,r0,r2 ;
 stwcx. r1,r0,r2  | lwarx r4,r3,r5 | stwcx. r1,r0,r2  ;
 bne  Fail0       |                | bne  Fail2       ;
 b   Exit0        |                | lwsync           ;
 Fail0:           |                | li r3,1          ;
 li r3,0          |                | stw r3,0(r4)     ;
 stw r3,0(r4)     |                | b   Exit2        ;
 Exit0:           |                | Fail2:           ;
                  |                | li r5,0          ;
                  |                | stw r5,0(r6)     ;
                  |                | Exit2:           ;
exists
(ok=1 /\ x=2 /\ 1:r1=2 /\ 1:r4=0)