Test WRC+ctrlrp+ctrlisyncar

PPC WRC+ctrlrp+ctrlisyncar
"RfePR DpCtrldWRP RfePA DpCtrlIsyncdRAR FreRP"
Cycle=RfePA DpCtrlIsyncdRAR FreRP RfePR DpCtrldWRP
Prefetch=0:x=T,2:x=T
Com=Rf Rf Fr
Orig=RfePR DpCtrldWRP RfePA DpCtrlIsyncdRAR FreRP
{ ok=1;
0:r2=x;
1:r2=x; 1:r4=y;
2:r2=y; 2:r4=x; 2:r6=ok;
}
 P0           | P1             | P2              ;
 li r1,1      | lwarx r1,r0,r2 | lwarx r1,r0,r2  ;
 stw r1,0(r2) | cmpw r1,r1     | stwcx. r1,r0,r2 ;
              | beq  LC00      | bne  Fail2      ;
              | LC00:          | cmpw r1,r1      ;
              | li r3,1        | beq  LC01       ;
              | stw r3,0(r4)   | LC01:           ;
              |                | isync           ;
              |                | lwarx r3,r0,r4  ;
              |                | b   Exit2       ;
              |                | Fail2:          ;
              |                | li r5,0         ;
              |                | stw r5,0(r6)    ;
              |                | Exit2:          ;
exists
(ok=1 /\ 1:r1=1 /\ 2:r1=1 /\ 2:r3=0)