Test WRC+ctrlpa+ctrlisyncra+A

PPC WRC+ctrlpa+ctrlisyncra+A
"RfeAP DpCtrldWPA RfeAR DpCtrlIsyncdRRA FreAA"
Cycle=RfeAP DpCtrldWPA RfeAR DpCtrlIsyncdRRA FreAA
Prefetch=0:x=T,2:x=T
Com=Rf Rf Fr
Orig=RfeAP DpCtrldWPA RfeAR DpCtrlIsyncdRRA FreAA
{ ok=1;
0:r2=x; 0:r4=ok;
1:r2=x; 1:r4=y; 1:r6=ok;
2:r2=y; 2:r4=x; 2:r6=ok;
}
 P0               | P1               | P2              ;
 li r1,1          | lwz r1,0(r2)     | lwarx r1,r0,r2  ;
 lwarx %sta,r0,r2 | cmpw r1,r1       | cmpw r1,r1      ;
 stwcx. r1,r0,r2  | beq  LC00        | beq  LC01       ;
 bne  Fail0       | LC00:            | LC01:           ;
 b   Exit0        | li r3,1          | isync           ;
 Fail0:           | lwarx %sta,r0,r4 | lwarx r3,r0,r4  ;
 li r3,0          | stwcx. r3,r0,r4  | stwcx. r3,r0,r4 ;
 stw r3,0(r4)     | bne  Fail1       | bne  Fail2      ;
 Exit0:           | b   Exit1        | b   Exit2       ;
                  | Fail1:           | Fail2:          ;
                  | li r5,0          | li r5,0         ;
                  | stw r5,0(r6)     | stw r5,0(r6)    ;
                  | Exit1:           | Exit2:          ;
exists
(ok=1 /\ 1:r1=1 /\ 2:r1=1 /\ 2:r3=0)