Test W+RW+WW+RW+poaas+A

PPC W+RW+WW+RW+poaas+A
"RfeAA PodRWAA WseAA PodWWAA RfeAA PodRWAA WseAA"
Prefetch=0:x=F,1:y=W,2:y=F,3:x=W
Com=Rf Ws Rf Ws
Orig=RfeAA PodRWAA WseAA PodWWAA RfeAA PodRWAA WseAA
{ ok=1;
0:r2=x; 0:r4=ok;
1:r2=x; 1:r4=y; 1:r6=ok;
2:r2=y; 2:r4=z; 2:r6=ok;
3:r2=z; 3:r4=x; 3:r6=ok;
}
 P0               | P1               | P2               | P3               ;
 li r1,2          | lwarx r1,r0,r2   | li r1,2          | lwarx r1,r0,r2   ;
 lwarx %sta,r0,r2 | stwcx. r1,r0,r2  | lwarx %sta,r0,r2 | stwcx. r1,r0,r2  ;
 stwcx. r1,r0,r2  | bne  Fail1       | stwcx. r1,r0,r2  | bne  Fail3       ;
 bne  Fail0       | li r3,1          | bne  Fail2       | li r3,1          ;
 b   Exit0        | lwarx %sta,r0,r4 | li r3,1          | lwarx %sta,r0,r4 ;
 Fail0:           | stwcx. r3,r0,r4  | lwarx %sta,r0,r4 | stwcx. r3,r0,r4  ;
 li r3,0          | bne  Fail1       | stwcx. r3,r0,r4  | bne  Fail3       ;
 stw r3,0(r4)     | b   Exit1        | bne  Fail2       | b   Exit3        ;
 Exit0:           | Fail1:           | b   Exit2        | Fail3:           ;
                  | li r5,0          | Fail2:           | li r5,0          ;
                  | stw r5,0(r6)     | li r5,0          | stw r5,0(r6)     ;
                  | Exit1:           | stw r5,0(r6)     | Exit3:           ;
                  |                  | Exit2:           |                  ;
~exists
(ok=1 /\ x=2 /\ y=2 /\ 1:r1=2 /\ 3:r1=1)