Test W+RW+RR+WR+poaas+A

PPC W+RW+RR+WR+poaas+A
"RfeAA PodRWAA RfeAA PodRRAA FreAA PodWRAA FreAA"
Prefetch=0:x=T,2:z=T,3:x=T
Com=Rf Rf Fr Fr
Orig=RfeAA PodRWAA RfeAA PodRRAA FreAA PodWRAA FreAA
{ ok=1;
0:r2=x; 0:r4=ok;
1:r2=x; 1:r4=y; 1:r6=ok;
2:r2=y; 2:r4=z; 2:r6=ok;
3:r2=z; 3:r4=x; 3:r6=ok;
}
 P0               | P1               | P2              | P3               ;
 li r1,1          | lwarx r1,r0,r2   | lwarx r1,r0,r2  | li r1,1          ;
 lwarx %sta,r0,r2 | stwcx. r1,r0,r2  | stwcx. r1,r0,r2 | lwarx %sta,r0,r2 ;
 stwcx. r1,r0,r2  | bne  Fail1       | bne  Fail2      | stwcx. r1,r0,r2  ;
 bne  Fail0       | li r3,1          | lwarx r3,r0,r4  | bne  Fail3       ;
 b   Exit0        | lwarx %sta,r0,r4 | stwcx. r3,r0,r4 | lwarx r3,r0,r4   ;
 Fail0:           | stwcx. r3,r0,r4  | bne  Fail2      | stwcx. r3,r0,r4  ;
 li r3,0          | bne  Fail1       | b   Exit2       | bne  Fail3       ;
 stw r3,0(r4)     | b   Exit1        | Fail2:          | b   Exit3        ;
 Exit0:           | Fail1:           | li r5,0         | Fail3:           ;
                  | li r5,0          | stw r5,0(r6)    | li r5,0          ;
                  | stw r5,0(r6)     | Exit2:          | stw r5,0(r6)     ;
                  | Exit1:           |                 | Exit3:           ;
~exists
(ok=1 /\ 1:r1=1 /\ 2:r1=1 /\ 2:r3=0 /\ 3:r3=0)