Test SB+sync+lwsyncpr

PPC SB+sync+lwsyncpr
"SyncdWR Fre LwSyncdWRPR FreRP"
Cycle=Fre LwSyncdWRPR FreRP SyncdWR
Prefetch=0:y=T,1:x=T
Com=Fr Fr
Orig=SyncdWR Fre LwSyncdWRPR FreRP
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r4=x;
}
 P0           | P1             ;
 li r1,1      | li r1,1        ;
 stw r1,0(r2) | stw r1,0(r2)   ;
 sync         | lwsync         ;
 lwz r3,0(r4) | lwarx r3,r0,r4 ;
exists
(0:r3=0 /\ 1:r3=0)