Test SB+lwsync+lwsyncar

PPC SB+lwsync+lwsyncar
"LwSyncdWR FrePA LwSyncdWRAR FreRP"
Cycle=FrePA LwSyncdWRAR FreRP LwSyncdWR
Prefetch=0:y=T,1:x=T
Com=Fr Fr
Orig=LwSyncdWR FrePA LwSyncdWRAR FreRP
{ ok=1;
0:r2=x; 0:r4=y;
1:r2=y; 1:r4=x; 1:r6=ok;
}
 P0           | P1               ;
 li r1,1      | li r1,1          ;
 stw r1,0(r2) | lwarx %sta,r0,r2 ;
 lwsync       | stwcx. r1,r0,r2  ;
 lwz r3,0(r4) | bne  Fail1       ;
              | lwsync           ;
              | lwarx r3,r0,r4   ;
              | b   Exit1        ;
              | Fail1:           ;
              | li r5,0          ;
              | stw r5,0(r6)     ;
              | Exit1:           ;
exists
(ok=1 /\ 0:r3=0 /\ 1:r3=0)