Test RWC+ctrlisync+poar+A

PPC RWC+ctrlisync+poar+A
"RfeAP DpCtrlIsyncdR FrePA PodWRAR FreRA"
Cycle=RfeAP DpCtrlIsyncdR FrePA PodWRAR FreRA
Prefetch=0:x=T,1:y=T,2:x=T
Com=Rf Fr Fr
Orig=RfeAP DpCtrlIsyncdR FrePA PodWRAR FreRA
{ ok=1;
0:r2=x; 0:r4=ok;
1:r2=x; 1:r4=y;
2:r2=y; 2:r4=x; 2:r6=ok;
}
 P0               | P1           | P2               ;
 li r1,1          | lwz r1,0(r2) | li r1,1          ;
 lwarx %sta,r0,r2 | cmpw r1,r1   | lwarx %sta,r0,r2 ;
 stwcx. r1,r0,r2  | beq  LC00    | stwcx. r1,r0,r2  ;
 bne  Fail0       | LC00:        | bne  Fail2       ;
 b   Exit0        | isync        | lwarx r3,r0,r4   ;
 Fail0:           | lwz r3,0(r4) | b   Exit2        ;
 li r3,0          |              | Fail2:           ;
 stw r3,0(r4)     |              | li r5,0          ;
 Exit0:           |              | stw r5,0(r6)     ;
                  |              | Exit2:           ;
exists
(ok=1 /\ 1:r1=1 /\ 1:r3=0 /\ 2:r3=0)