Test MP+po+lwsyncrp

PPC MP+po+lwsyncrp
"PodWW RfePR LwSyncdRRRP Fre"
Cycle=RfePR LwSyncdRRRP Fre PodWW
Prefetch=1:x=T
Com=Rf Fr
Orig=PodWW RfePR LwSyncdRRRP Fre
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r4=x;
}
 P0           | P1             ;
 li r1,1      | lwarx r1,r0,r2 ;
 stw r1,0(r2) | lwsync         ;
 li r3,1      | lwz r3,0(r4)   ;
 stw r3,0(r4) |                ;
exists
(1:r1=1 /\ 1:r3=0)