PPC MP+po+lwsyncra "PodWW RfePR LwSyncdRRRA FreAP" Cycle=RfePR LwSyncdRRRA FreAP PodWW Prefetch=1:x=T Com=Rf Fr Orig=PodWW RfePR LwSyncdRRRA FreAP { ok=1; 0:r2=x; 0:r4=y; 1:r2=y; 1:r4=x; 1:r6=ok; } P0 | P1 ; li r1,1 | lwarx r1,r0,r2 ; stw r1,0(r2) | lwsync ; li r3,1 | lwarx r3,r0,r4 ; stw r3,0(r4) | stwcx. r3,r0,r4 ; | bne Fail1 ; | b Exit1 ; | Fail1: ; | li r5,0 ; | stw r5,0(r6) ; | Exit1: ; exists (ok=1 /\ 1:r1=1 /\ 1:r3=0)