Test MP+lwsyncaa+ctrlar

PPC MP+lwsyncaa+ctrlar
"LwSyncdWWAA RfeAA DpCtrldRAR FreRA"
Cycle=RfeAA DpCtrldRAR FreRA LwSyncdWWAA
Prefetch=1:x=T
Com=Rf Fr
Orig=LwSyncdWWAA RfeAA DpCtrldRAR FreRA
{ ok=1;
0:r2=x; 0:r4=y; 0:r6=ok;
1:r2=y; 1:r4=x; 1:r6=ok;
}
 P0               | P1              ;
 li r1,1          | lwarx r1,r0,r2  ;
 lwarx %sta,r0,r2 | stwcx. r1,r0,r2 ;
 stwcx. r1,r0,r2  | bne  Fail1      ;
 bne  Fail0       | cmpw r1,r1      ;
 lwsync           | beq  LC00       ;
 li r3,1          | LC00:           ;
 lwarx %sta,r0,r4 | lwarx r3,r0,r4  ;
 stwcx. r3,r0,r4  | b   Exit1       ;
 bne  Fail0       | Fail1:          ;
 b   Exit0        | li r5,0         ;
 Fail0:           | stw r5,0(r6)    ;
 li r5,0          | Exit1:          ;
 stw r5,0(r6)     |                 ;
 Exit0:           |                 ;
exists
(ok=1 /\ 1:r1=1 /\ 1:r3=0)